CE869: Your task for this assignment is to implement a 16 bit CPU To make the assignment feasible within the time frame: High Level Logic Design Assignment, UOE, UK
Your task for this assignment is to implement a 16 bit CPU. To make the assignment feasible within the time frame available for this module, the type of CPU will be fairly simple. In particular, the “program sequencing/control flow instruction” datapath can be modeled after the one on the left of Figure 1, while the […]