Explain, with reference to the level-1 cache, the level-2 cache and DRAM, how the processor accesses memory. What advantage does level-1 have over level-2 cache, and what advantage do these have over DRAM.
Discuss the power management modes supported by the PXII3, and also by the PXII4.
Which interrupts are supported with the AIP and where are they typically used?
Explain how the ISA and IDE busses share the same control and data lines.
Contrast the HX motherboard with the LX motherboard.
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