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Illustrate the Trojan taxonomy. Describe the classification of Trojans based on the “Activation Mechanism”. Describe the classification of Trojans based on the “Payload”. Illustrate the taxonomy of Trojan countermeasures.

Provide a brief description of a generic Trojan structure. 1. Describe the difference between a combinational and a sequential Trojan. 2. Provide an example of hardware Trojan in a cryptomodule. 3. Give a comparison of hardware Trojans in ASIC and FPGA designs.

DFT structures are inserted only by the SoC designers. 1. Apart from fabrication, Foundries also perform tests to find defective ICs. 2. All hardware Trojans have a trigger. 3. The foundry is a trusted entity in the SoC design flow.

Briefly describe the built-in self-authentication (BISA) technique. Consider the following scenario: A rogue foundry wants to insert Trojan in BISA-protected design. The foundry wants to replace higher driving strength gates with the same functionality lower driving strength gates, for example, replace 8x buffer with 1x buffer, to make room for Trojan cell insertion. Give your

Who are the potential adversaries to implant a hardware Trojan? Provide a brief description on each of them. In your opinion, which one is most difficult to defend? 1. How can CAD tools introduce vulnerabilities? Explain with examples. 2. Why cannot test and debug structures simply be removed when they are creating unintentional security vulnerabilities?

Describe the motives of the semiconductor industry to shift to a horizontal business model. How does horizontal business model reduce cost and time-to-market? Why are most companies becoming fabless? Describe the different types of IPs that can be procured from third-party vendors. What types of tests are performed on a fabricated chip by the Foundry

All security vulnerabilities are intentionally introduced. DFT does not create security issues. SoC developers are potential victims of IP piracy. Out-of-spec. parts have reliability issues.

Let us consider the following data for a semiconductor design company “X”: • Actual yield, Y = 0.9 • Die area A = 1.5 cm × 1.5 cm • Dies are processed on an R = 200 mm diameter wafer at $1500/wafer • Each mask cost $100,000 (Total 10 masks) • 5-man development team at

Describe the taxonomy of different types of counterfeits. 1. Explain how IP overuse and IP piracy may take place. Provide respective examples. 2. Why do overproduced ICs cost less than their original counterpart? 3. Why does using out-of-spec chips pose a threat? 4. Why are Trojans inserted by the foundry difficult to detect? 5. What

Describe the lifecycle of a modern electronic hardware / ASIC design. 1. Classify the attacks on hardware IPs in terms of the attacker’s origin and intent. Briefly describe possible attack instances of hardware Trojan and IC overproduction. 2. How can an IP be exploited via reverse engineering? Briefly explain potential attack instances of reverse engineering.