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Explain how you can increase the security of the response of a weak PUF (used for key generation) against possible guessing or side-channel attacks. 1. Briefly explain the major challenges that PUFs and TRNGs suffer.

Briefly explain the differences between a TRNG and a PRNG? Which one of them would you consider, if you were only interested in: (a) High entropy. (b) High speed. (c) Low runtime noise.

Consider two types of PUFs, namely “M” and “N”. Their intra- and inter-hamming distances are presented in Fig. 12.22. Explain which type of the two PUFs serves better for the following applications: (a) authentication, (b) key generation.

How potential vulnerabilities can be introduced by design mistakes? Show an example. 1. How potential vulnerabilities can be introduced by CAD tools? Show an example. 2. Describe the principle of the following tests: (i) Fuzzing, (ii) Negative Testing, (iii) Penetration Testing. 3. How does the “Hiding Mechanisms” protect against side-channel attacks?

Describe the “Assets” that can be found in a SoC. 1. How can the entropy asset be exploited? 2. How can a scan-based attack be performed remotely? Show an example. 3. Explain the differences between semi-invasive and invasive attack. 4. Describe the capabilities of an “Insider” attacker. What kind of attacks can an “Insider” perform?

Random number can be an asset. Remote attackers cannot perform attacks exploiting scan structure. Injecting faults to modify SRAM contents is a semi-invasive attack. Side-channel attacks fall into invasive attack category. Vulnerabilities associated with don’t-care states are introduced in the RTL stage. Vulnerabilities associated with DFT structure are introduced in the gate-level stage.

In a semiconductor supply chain, what are the security and trust issues in an untrusted design house from the IP vendor’s point of view? 1. List all possible security and trust issues in an IC supply chain when the design house sends the design for fabrication to an untrusted facility. 2. Why is encryption not

SAT attack directly finds the key used for obfuscation. The features of design integrated with gate camouflaging can never be reverse engineered. The entire truth table is not needed to attack a design obfuscated by camouflaging. In state space obfuscation, modification cells are added to hide the newly inserted FSM. An attacker cannot reverse engineer

Reverse engineering of hardware IP is considered illegal. 1. None of the software obfuscation approaches are applicable to hardware IPs. 2. The design house is untrusted in certain scenarios in an IC supply chain. 3. For maximum output entropy in logic locking, Hamming Distance should be 100%.

Determine the correct key for the logic encrypted circuit below in Fig. 14.12 (in other words, what key makes x = x’ and y = y’). Explain your answer. 1. Describe the vulnerabilities in each step of the supply chain of an IC. 2. Briefly describe the possible obfuscation-based solutions for countering hardware IP piracy