The DMA facility allows parallelism between CPU and I/O transfer with a limitation: the CPU cannot use the bus if an I/O transfer is in progress. As an improvement, a designer proposed dual port memory connected on two different buses: one for communication with CPU and the other for I/O transfer. Though this provides full parallelism, the hardware cost increases due to additional circuits. Another designer proposed having I/O memory as a separate module, physically present in the I/O controller, but logically in the main memory space (equivalent to the video buffer in the CRT controller). What are the merits and demerits of the second approach?